1. Field of the Invention
The present invention generally relates to a thin film magnetic memory device. More particularly, the present invention relates to a random access memory (RAM) including memory cells having a magnetic tunnel junction (MTJ).
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has attracted attention as a memory device capable of non-volatile data storage with low power consumption. The MRAM device is a memory device capable of non-volatile data storage using a plurality of thin film magnetic elements formed in a semiconductor integrated circuit and also capable of random access to each thin film magnetic element.
In particular, recent announcement shows that the use of thin film magnetic elements having a magnetic tunnel junction (MTJ) as memory cells significantly improves performance of the MRAM device. The MRAM device including memory cells having a magnetic tunnel junction is disclosed in technical documents such as “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, and “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, February 2000.
FIG. 11 schematically shows the structure of a memory cell having a magnetic tunnel junction (hereinafter, sometimes simply referred to as “MTJ memory cell”).
Referring to FIG. 11, the MTJ memory cell includes a tunneling magneto-resistance element TMR having an electric resistance varying according to a magnetically written storage data level, and an access element ATR. Access transistor ATR is connected in series with tunneling magneto-resistance element TMR between a write bit line WBL and a read bit line RBL. Typically, a field effect transistor formed on a semiconductor substrate is used as access transistor ATR.
A write bit line WBL, a write digit line WDL, a word line WL and a read bit line RBL are provided for the MTJ memory cell. Write bit line WBL and write digit line WDL allow data write currents of different directions to flow therethrough in write operation, respectively. Word line WL is used to conduct read operation. Read bit line RBL receives a data read current. In read operation, tunneling magneto-resistance element TMR is electrically coupled between write bit line WBL having a ground voltage GND and read bit line RBL in response to turning-ON of access transistor ATR.
FIG. 12 is a conceptual diagram illustrating write operation to the MTJ memory cell.
Referring to FIG. 12, tunneling magneto-resistance element TMR has a ferromagnetic material layer FL having a fixed magnetization direction (hereinafter, sometimes simply referred to as “fixed magnetic layer”), and a ferromagnetic material layer VL that is magnetized in the direction corresponding to an external magnetic field (hereinafter, sometimes simply referred to as “free magnetic layer”). A tunneling barrier (tunneling film) TB is interposed between fixed magnetic layer FL and free magnetic layer VL. Tunneling barrier TB is formed from an insulator film. Free magnetic layer VL is magnetized either in the same direction as or in the opposite (antiparallel) direction to that of fixed magnetic layer FL according to a write data level. Fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL form a magnetic tunnel junction.
The electric resistance of tunneling magneto-resistance element TMR varies according to the relation between the respective magnetization directions of fixed magnetic layer FL and free magnetic layer VL. More specifically, the electric resistance of tunneling magneto-resistance element TMR has a minimum value Rmin when fixed magnetic layer FL and free magnetic layer VL have parallel magnetization directions, and has a maximum value Rmax when they have opposite (antiparallel) magnetization directions.
In write operation, word line WL is inactivated and access transistor ATR is turned OFF. In this state, a data write current for magnetizing free magnetic layer VL is applied to each of write bit line WBL and write digit line WDL in a direction corresponding to the write data level.
FIG. 13 is a conceptual diagram showing the relation between the data write current and the magnetization direction of the tunneling magneto-resistance element in write operation.
Referring to FIG. 13, the abscissa H(EA) indicates a magnetic field that is applied to free magnetic layer VL of tunneling magneto-resistance element TMR in the easy-axis (EA) direction. The ordinate H(HA) indicates a magnetic field that is applied to free magnetic layer VL in the hard-axis (HA) direction. Magnetic fields H(EA), H(HA) respectively correspond to two magnetic fields produced by the currents flowing through write bit line WBL and write digit line WDL.
In the MTJ memory cell, fixed magnetic layer FL is magnetized in the fixed direction along the easy axis of free magnetic layer VL. Free magnetic layer VL is magnetized either in the direction parallel or antiparallel (opposite) to that of fixed magnetic layer FL along the easy axis according to the storage data level (“1” and “0”). The MTJ memory cell is thus capable of storing 1-bit data (“1” and “0”) according to the two magnetization directions of free magnetic layer VL.
The magnetization direction of free magnetic layer VL can be rewritten only when the sum of the applied magnetic fields H(EA) and H(HA) reaches the region outside the asteroid characteristic line shown in the figure. In other words, the magnetization direction of free magnetic layer VL does not switch if the strength of an applied data write magnetic field corresponds to the region inside the asteroid characteristic line.
As shown by the asteroid characteristic line, applying a magnetic field of the hard-axis direction to free magnetic layer VL enables reduction in a magnetization threshold value required to change the magnetization direction along the easy axis.
When the operation point of write operation is designed as in the example of FIG. 13, a data write magnetic field of the easy-axis direction is designed to have a strength HWR in the MTJ memory cell to be written. In other words, a data write current to be applied to write bit line WBL or write digit line WDL is designed to produce the data write magnetic field HWR. In general, data write magnetic field HWR is given by the sum of a switching magnetic field HSW required to switch the magnetization direction and a margin ΔH. Data write magnetic field HWR is thus given by HWR=HSW+ΔH.
In order to rewrite the storage data of the MTJ memory cell, that is, the magnetization direction of tunneling magneto-resistance element TMR, a data write current of at least a prescribed level must be applied to both write digit line WDL and write bit line WBL. Free magnetic layer VL in tunneling magneto-resistance element TMR is thus magnetized in the direction parallel or opposite (antiparallel) to that of fixed magnetic layer FL according to the direction of the data write magnetic field along the easy axis (EA). The magnetization direction written to tunneling magneto-resistance element TMR i.e., the storage data of the MTJ memory cell, is held in a non-volatile manner until another data write operation is conducted.
FIG. 14 is a conceptual diagram illustrating read operation from the MTJ memory cell.
Referring to FIG. 14, in read operation, access transistor ATR is turned ON in response to activation of word line WL. Write bit line WBL is set to ground voltage GND. As a result, tunneling magneto-resistance element TMR is pulled down to ground voltage GND and electrically coupled to read bit line RBL.
If read bit line RBL is then pulled up to a prescribed voltage, a memory cell current Icell corresponding to the electric resistance of tunneling magneto-resistance element TMR, that is, the storage data level of the MTJ memory cell, flows through a current path including read bit line RBL and tunneling magneto-resistance element TMR. For example, the storage data can be read from the MTJ memory cell based by comparing memory cell current Icell with a prescribed reference current.
The electric resistance of tunneling magneto-resistance element TMR thus varies according to the magnetization direction that is rewritable by an applied data write magnetic field. Accordingly, non-volatile data storage can be realized by using electric resistances Rmax, Rmin of tunneling magneto-resistance element TMR as the storage data levels (“1”and “0”). The MRAM device thus stores data by using the difference between junction resistances (ΔR=Rmax−Rmin) that corresponds to the difference in storage data level in tunneling magneto-resistance element TMR.
In general, the MRAM device includes reference cells for producing a reference current to be compared with a memory cell current Icell, in addition to the normal MTJ memory cells for storing data. The reference cells must be designed to produce a reference current that is equal to an intermediate value of the two memory cell currents Icell respectively corresponding to the two electric resistances Rmax, Rmin of the MTJ memory cell. Basically, these reference cells are also designed to have the same tunneling magneto-resistance element TMR as that of the normal MTJ memory cells.
A current passing through tunneling magneto-resistance element TMR is significantly affected by the thickness of an insulating film used as a tunneling film. Accordingly, if the normal MTJ memory cell and the reference cell have any difference in thickness of the tunneling film, the reference current cannot be set to a desired level. For this reason, it is difficult to accurately set the reference current produced by the reference cell to a level that allows the above small current difference to be sensed. Accordingly, accuracy of read operation may be reduced by variation in reference current.
In particular, in a common MTJ memory cell, the resistance difference ΔR produced according to the storage data level is not so large. Typically, electric resistance Rmin is at most about several tens of percents of Rmax. Memory cell current Icell therefore varies at most on the order of microamperes (μA: 10−6 A) according to the storage data level. Accordingly, the respective tunneling films of the normal MTJ memory cell and the reference cell must be formed with an accurate thickness.
However, such a strict manufacturing process regarding accuracy of the thickness of the tunneling film may reduce the manufacturing yield and the like, thereby possibly increasing the manufacturing costs. Accordingly, there is a demand for the MRAM device capable of accurately conducting read operation based on the resistance difference ΔR in the MTJ memory cell without requiring a strict manufacturing process.
In order to solve the above problems, U.S. Pat. No. 6,317,376 B1 discloses the structure of an MRAM device for conducting read operation by a so-called “self-reference method”. More specifically, this MRAM device conducts read operation by merely accessing a selected memory cell without using any reference cell.
According to the conventional self-reference read operation disclosed in the above U.S. Pat. No. 6,317,376 B1, each read operation is formed by the following five operations which are conducted successively: (1) reading storage data from a selected memory cell; (2) reading data after forcibly writing data “0” to the selected memory cell; (3) reading data after forcibly writing data “1” to the selected memory cell; (4) producing read data based on the read operation results of (1) to (3); and (5) rewriting (restoring) the read data to the selected memory cell. In such read operation, data can be read by merely accessing the selected memory cell. As a result, read operation can be conducted with high accuracy regardless of manufacturing variation of reference cells.
In the conventional self-reference read operation, however, forcible write and read operations must be repeatedly conducted in each read operation. Moreover, since the storage data of the selected memory cell is destroyed, rewrite operation is required in each read operation. This hinders implementation of an improved read operation speed.